The present invention relates generally to MOSFET transistors and more generally to DMOS transistors having a trench structure.
DMOS (Double diffused MOS) transistors are a type of MOSFET (Metal On Semiconductor Field Effect Transistor) that use diffusion to form the transistor regions. DMOS transistors are typically employed as power transistors to provide high voltage circuits for power integrated circuit applications. DMOS transistors provide higher current per unit area when low forward voltage drops are required.
A typical discrete DMOS circuit includes two or more individual DMOS transistor cells which are fabricated in parallel. The individual DMOS transistor cells share a common drain contact (the substrate), while their sources are all shorted together with metal and their gates are shorted together by polysilicon. Thus, even though the discrete DMOS circuit is constructed from a matrix of smaller transistors, it behaves as if it were a single large transistor. For a discrete DMOS circuit it is desirable to maximize the conductivity per unit area when the transistor matrix is turned on by the gate.
One particular type of DMOS transistor is a so-called trench DMOS transistor in which the channel is formed vertically and the gate is formed in a trench extending between the source and drain. The trench, which is lined with a thin oxide layer and filled with polysilicon, allows less constricted current flow and thereby provides lower values of specific on-resistance. Examples of trench DMOS transistors are disclosed in U.S. Pat. Nos. 5,072,266, 5,541,425, and 5,866,931.
One important characteristic determining the quality of a DMOS transistor is the leakage current that arises between the polysilicon gate and the substrate. This current, which adversely affects the performance of the device, depends in part on the breakdown voltage of the gate oxide layer that lines the trench. Unfortunately, since adjacent sidewalls of the trench typically meet at a sharp corner, i.e., a 90 degree angle, large electric fields arise between the polysilicon and the substrate. These electric fields, in turn, greatly reduce the breakdown voltage of the gate oxide layer, thus increasing the leakage current of the device.
Accordingly, there is a need for a trench DMOS transistor that has a gate oxide layer with an increased breakdown voltage.
The present invention provides a trench DMOS transistor cell that includes a substrate of a first conductivity type and a body region located on the substrate, which has a second conductivity type. At least one trench extends through the body region and the substrate. An insulating layer lines the trench and a conductive electrode is placed in the trench overlying the insulating layer. A source region of the first conductivity type is located in the body region adjacent to the trench. The trench has sidewalls that define a polygon in the plane of the substrate so that adjacent sidewalls contact one another at an angle greater than 90 degrees.
In accordance with another aspect of the invention, the polygon defined by the trench sidewalls is a hexagon and angle formed by adjacent sidewalls is equal to 135 degrees.
In accordance with another aspect of the invention, the trench has a generally rectangular cross-sectional shape in at least two orthogonal planes. The DMOS transistor cell also includes a drain electrode disposed on a surface of the substrate opposing the body region.
In accordance with another aspect of the invention, the insulating layer may be an oxide layer and the conductive electrode may include polysilicon.
In accordance with yet another aspect of the invention, the polysilicon forming the conductive electrode includes a layer of undoped polysilicon and a layer of doped polysilicon.
In accordance with another embodiment of the invention, the rounded corners of the trench sidewalls have a radius of curvature about equal to the width of the trench.